EuMC: A 9 to 12.1GHz Sub-Sampling ADPLL Based on a Stochastic Flash TDC and a DCO with a ``Folded'' Common-Mode Resonator Exhibiting Less Than 90fs Jitter and a Peak FoMj of -248dB in 16nm FinFet CMOS
R. Levinger, E. Shumaker, A. Farber, S. Bershansky, N. Geron, O. Degani, A. Ravi, R. Banin, E. Banin, J. Kadry, G. Horovitz
Proceedings of the 50th European Microwave Conference
A 9 to 12.1 GHz Sub-Sampling ADPLL based on a
Stochastic Flash TDC and a DCO with a ?Folded?
Common-Mode Resonator Exhibiting less than 90fs
Jitter and a peak FoMj of -248 dB in 16nm FinFet
CMOS
R. Levinger, E. Shumaker, A. Farber, S. Bershansky, N. Geron, O. Degani, A. Ravi, R. Banin, E. Banin,
J. Kadry and G. Horovitz
Wireless Connectivity S